Message signaled interrupts (MSI) are a feature that enables a device coupled to a processor to request service by writing a system-specified data value to a system-specified address using, for example, a memory write transaction. An MSI transaction enables a device to request an interrupt service by sending the MSI transaction as an inbound memory write to the processor. MSI transactions can simplify board design by removing out of band interrupt routing.
Message signaled interrupts allow a device to write a small amount of data to a special address in memory space. The chipset will deliver the corresponding interrupt to the processor. However, this data is used by the chipset to determine which interrupt to trigger on which processor, but it is not available for the device to communicate additional information to the interrupt handler.
One drawback of MSI transactions is the latency involved with servicing an interrupt. For example, when a device requests an interrupt service using MSI, the device generates a MSI transaction including a system-specified message and a system-specified address. Once a processor receives the MSI transaction, the processor has to communicate with the requesting device to retrieve data required to service the interrupt. However, the latency involved with communications with the device may be relatively long.